Education Program

SC2001 offers high school and middle school teachers an opportunity to learn computer modeling and simulation and the application of computational science to the science and mathematics curricula. Through a national competition, a core group of 27 teams with four teachers each has been identified and will participate in an 18-month program that starts at SC2001, continues with monthly videoconference sessions on specific computational science topics through the winter, and includes a two-week Summer Institute in July 2002. The following Education Program sponsors fund these teams:

National Science Foundation
Association of Computing Machinery
IEEE Computer Society
IEEE Foundation
Cisco Systems, Inc.
Compaq Computer Corporation
High Performance Systems
Microsoft Corporation
National Aeronautics and Space Administration
SBC DataComm
SC2001 Conference
Shodor Education Foundation, Inc.
Wolfram Research, Inc.

At the conclusion of this program, the selected teachers will become leaders in their school systems and region, providing inspiration for a wider adoption of modeling and simulation by classroom teachers. Each team will learn state-of-the-art modeling software tools that will enable them to create new classroom modules that adhere to the national science and mathematics standards. These modules will then be placed in a repository and made publicly available.

Additional teams or individual teachers can participate in the SC2001 Conference along with the selected teams by registering for the SC2001 Education Program and attending the Education Program sessions. Full participation in the hands-on sessions will require additional participants to bring wireless laptops. These participants will learn the fundamentals of the computational science curriculum development tools and will learn how to select appropriate topics for computational science modules for classroom instruction through interaction with modeling experts and practicing computational scientists. Interested teachers can receive additional information by sending email to education@sc2001.org or by visiting the SC2001 website at http://www.sc2001.org.

Education Program Speakers

  • Richard Allen, Albuquerque High Performance Computing Center
  • Lisa Bievenue, National Center for Supercomputing Applications
  • Edna Gentry, University of Alabama in Huntsville
  • Bob Gotwals, Shodor Education Foundation
  • Barbara Helland, Krell Institute
  • Jeff Huskamp, East Carolina University
  • Eric Jakobsson, National Center for Supercomputing Applications
  • Cynthia Lanius, Rice University
  • Scott Lathrop, National Center for Supercomputing Applications
  • Ernie Marshburn, East Carolina University
  • Robert Panoff, Shodor Education Foundation
  • Helen Parke, East Carolina University
  • Susan Ragan, Maryland Virtual High School

    Jeffrey C. Huskamp, Education Chair
    East Carolina University

    Lisa Bievenue, Education Co-Chair
    National Center for Supercomputing Applications

    Edna Gentry, Education Co-Chair
    University of Alabama at Huntsville

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Technical Papers

The technical papers component of the SC2001 program is especially strong and vibrant. Sixty papers were selected from a pool of 240 submissions covering a broad technical scope and offering a truly international perspective on high performance networking and computing. Eighty-four of the papers were student submissions, of which seventeen were accepted and six nominated for the best student paper award.

In my view, SC has come into its own with this year’s program. Several of the papers represent the unique combination of real science, novel computational methods, and in-depth performance analysis on leading-edge platforms that only comes together at SC. You will find sessions such as “Sea, Wind, and Fire,” “Groundbreaking Applications,” and “Material Science” tackling computational modeling of the ocean, atmosphere, combustion, and structures. Several of these are finalists for the Gordon Bell Prize. Clusters and Grids are well represented from hardware and software viewpoints, reflecting the emergence of these important platforms. In-depth design studies explore leading commericial architectures, novel hardware devices, and emerging interconnects. Theoretical and empirical studies investigate new parallel numerical methods, algorithms, and performance-analysis techniques. Networking and storage are explored from unusual angles, and eScience emerges in the context of new modes of interacting with computational processes and high performance architectures.

Together, these papers provide a rich treatment of the latest technical work over the broad scope of high performance networking and computing. They are complemented with workshops on selected topics and a leading Masterworks track of invited speakers.

I would like to thank the members of the Technical Papers Committee and the Program Committee, who worked so hard to bring it all together and the authors from around the world who have built such a strong program. I think you too will find it exciting.

Sessions Chronologically
Sessions Alphabetically
 Architectures

    • Scientific Computing on the Itanium™…

ACMIEEE

    • The Sun Fireplane System Interconnect…

ACMIEEE

    • Parallel Graphics and Interactivity…

ACMIEEE

 Algorithmic Load Balancing

    • Large Scale Parallel Structured…

ACMIEEE

    • Parallel Interval-Newton…

ACMIEEE

    • Dynamic Load Balancing of SAMR…

ACMIEEE

 Software Scalability

    • Scalable Parallel Application Launch…

ACMIEEE

    • Scaling Iregular Parallel Codes…

ACMIEEE

    • A Parallel Java Grande Benchmark…

ACMIEEE

 Algorithms

    • Stable, Globally Non-iterative…

ACMIEEE

    • Stochastic Search for Signal…

ACMIEEE

    • A Hypergraph-Partitioning Approach…

ACMIEEE

 Communication Structures

    • ORT—A Communication Library…

ACMIEEE

    • On-the-fly Calculation…

ACMIEEE

    • Removing the Overhead…

ACMIEEE

 Architectures

    • Scientific Computing on the Itanium™…

ACMIEEE

    • The Sun Fireplane System Interconnect…

ACMIEEE

    • Parallel Graphics and Interactivity…

ACMIEEE

 Material Science Applications

    • Scalable Atomistic Simulation…

ACMIEEE

    • An 8.61 Tflop/s Molecular…

ACMIEEE

    • Multi-teraflops Spin Dynamics…

ACMIEEE

 Communication Structures

    • ORT—A Communication Library…

ACMIEEE

    • On-the-fly Calculation…

ACMIEEE

    • Removing the Overhead…

ACMIEEE

 Mesh Methods

    • Achieving Extreme Resolution…

ACMIEEE

    • A Distributed Memory Unstructured…

ACMIEEE

    • Multilevel Algorithms for Generating…

ACMIEEE

 Computational Grid  Applications

    • Applying Scheduling and Tuning…

ACMIEEE

    • An Automatic Design Optimization…

ACMIEEE

    • Numerical Libraries and the Grid…

ACMIEEE

 Computational Grid Portals  and Networks

    • The XCAT Science Portal

ACMIEEE

    • A Jini-based Computing…

ACMIEEE

    • Efficient Network and I/O…

ACMIEEE

 Computational Grid Environments and  Security

    • Supporting Efficient Execution… .

pdf 208K

    • Optimisation of Component-based… .

pdf 128K

    • Adapting Globus and Kerberos… .

pdf 108K

 Computational Grid I/O

    • LegionFS: A Secure and Scalable…

ACMIEEE

    • High-Performance Remote Access…

ACMIEEE

    • Gathering at the Well…

ACMIEEE

 Computational Grid I/O

    • LegionFS: A Secure and Scalable…

ACMIEEE

    • High-Performance Remote Access…

ACMIEEE

    • Gathering at the Well…

ACMIEEE

 Algorithmic Load Balancing

    • Large Scale Parallel Structured…

ACMIEEE

    • Parallel Interval-Newton…

ACMIEEE

    • Dynamic Load Balancing of SAMR…

ACMIEEE

 Computational Grid Portals  and Networks

    • The XCAT Science Portal

ACMIEEE

    • A Jini-based Computing…

ACMIEEE

    • Efficient Network and I/O…

ACMIEEE

 Sea, Wind, and Fire

    • Coastal Ocean Modeling…

ACMIEEE

    • Terascale Spectral Element…

ACMIEEE

    • High Resolution Weather Modeling…

ACMIEEE

 Efficient Layouts for  Hierarchical Memories

    • A Ghost Cell Expansion…

ACMIEEE

    • Improving Parallel Irregular…

ACMIEEE

    • Increasing Temporal Locality…

ACMIEEE

 Reconfigurable Architectures

    • Delivering Acceleration…

ACMIEEE

    • Parallel Dedicated hardware…

ACMIEEE

    • Cost Effectiveness of an Adaptable…

ACMIEEE

 Fast I/O

    • MPI-IO/GPFS…

ACMIEEE

    • A Case Study in Application…

ACMIEEE

    • The Design of I/O-efficient…

ACMIEEE

 Groundbreaking Applications

    • Solution of a Three-Body…

ACMIEEE

    • Parallel Implementation and…

ACMIEEE

    • Modeling of Seismic Wave…

ACMIEEE

 Groundbreaking Applications

    • Solution of a Three-Body…

ACMIEEE

    • Parallel Implementation and…

ACMIEEE

    • Modeling of Seismic Wave…

ACMIEEE

 Information Retrieval and Transaction  Processing

    • Efficient Execution of Multiple…

ACMIEEE

    • Dynamic Page Placement…

ACMIEEE

    • Compressing Inverted Files…

ACMIEEE

 Information Retrieval and Transaction  Processing

    • Efficient Execution of Multiple…

ACMIEEE

    • Dynamic Page Placement…

ACMIEEE

    • Compressing Inverted Files…

ACMIEEE

 Performance Prediction

    • On Using SCALEA for Performace…

ACMIEEE

    • Modeling and Detecting Performance…

ACMIEEE

    • Predictive Performance and Scalability…

ACMIEEE

 Material Science Applications

    • Scalable Atomistic Simulation…

ACMIEEE

    • An 8.61 Tflop/s Molecular…

ACMIEEE

    • Multi-teraflops Spin Dynamics…

ACMIEEE

 Algorithms

    • Stable, Globally Non-iterative…

ACMIEEE

    • Stochastic Search for Signal…

ACMIEEE

    • A Hypergraph-Partitioning Approach…

ACMIEEE

 Mesh Methods

    • Achieving Extreme Resolution…

ACMIEEE

    • A Distributed Memory Unstructured…

ACMIEEE

    • Multilevel Algorithms for Generating…

ACMIEEE

 Novel Graphics and Grids

    • Fast Matrix Multiplies…

ACMIEEE

    • Next-Generation Visual…

ACMIEEE

    • Global Static Indexing…

ACMIEEE

 Networking

    • EMP: Zero-copy OS-bypass…

ACMIEEE

    • Design and Implementation of FMPL…

ACMIEEE

    • A New Routing Mechanism…

ACMIEEE

 Computational Grid  Applications

    • Applying Scheduling and Tuning…

ACMIEEE

    • An Automatic Design Optimization…

ACMIEEE

    • Numerical Libraries and the Grid…

ACMIEEE

 Novel Graphics and Grids

    • Fast Matrix Multiplies…

ACMIEEE

    • Next-Generation Visual…

ACMIEEE

    • Global Static Indexing…

ACMIEEE

 Networking

    • EMP: Zero-copy OS-bypass…

ACMIEEE

    • Design and Implementation of FMPL…

ACMIEEE

    • A New Routing Mechanism…

ACMIEEE

 Performance Prediction

    • On Using SCALEA for Performace…

ACMIEEE

    • Modeling and Detecting Performance…

ACMIEEE

    • Predictive Performance and Scalability…

ACMIEEE

 Computational Grid Environments and  Security

    • Supporting Efficient Execution…

ACMIEEE

    • Optimisation of Component-based…

ACMIEEE

    • Adapting Globus and Kerberos…

ACMIEEE

 Reconfigurable Architectures

    • Delivering Acceleration…

ACMIEEE

    • Parallel Dedicated hardware…

ACMIEEE

    • Cost Effectiveness of an Adaptable…

ACMIEEE

 Efficient Layouts for  Hierarchical Memories

    • A Ghost Cell Expansion…

ACMIEEE

    • Improving Parallel Irregular…

ACMIEEE

    • Increasing Temporal Locality…

ACMIEEE

 Sea, Wind, and Fire

    • Coastal Ocean Modeling…

ACMIEEE

    • Terascale Spectral Element…

ACMIEEE

    • High Resolution Weather Modeling…

ACMIEEE

 Fast I/O

    • MPI-IO/GPFS…

ACMIEEE

    • A Case Study in Application…

ACMIEEE

    • The Design of I/O-efficient…

ACMIEEE

 Software Scalability

    • Scalable Parallel Application Launch…

ACMIEEE

    • Scaling Iregular Parallel Codes…

ACMIEEE

    • A Parallel Java Grande Benchmark…

ACMIEEE

 

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AWARDS CAP SC2001

HIGH-PERFORMANCE COMPUTING AND NETWORKING CONFERENCE

DENVER, CO — SC2001, the conference of high-performance networking and computing capped the most successful programs in its history by recognizing outstanding achievements and contributions in these fields.

The conference attracted nearly 200 exhibitors and over 5200 attendees, each of whom on average will spend between $3.5- and $7-million on planned purchases as a result of the week-long event.

The awards presented this afternoon honored a range of people and their accomplishments.

The primary award was the third annual IEEE Computer Society Seymour Cray Computer Engineering Award. This honor recognizes innovative contributions to high-performance computing systems that exemplify Seymour Cray’s creative spirit.

This year it was awarded to John L. Hennessy, President of Stanford University. Included is a $10,000 honorarium funded by an SGI endowment.

The Gorden Bell Prize is named after the Digital Equipment vice president. It is awarded annually at SC for the best peak computer performance, the best performance/price ratio and for a special category.

The Gordon Bell winner was the team of Toshiyuki Fukushige and Junichiro Makino, who achieved a simulation of black holes in a galactic center at a computer processing speed of 11.55 trillion floating operations per second.

The Gordon Bell Price/Performance prize went to Joon Hwang, Seung Kim and Chang Lee. Their study of impact locating on aircraft structure by low-cost cluster cost 24.6 cents/Mflops, or less than a U.S. quarter per 1-million floating operations per second.

The winner of the Gordon Bell Prize in the special category of supporting efficient execution in the heterogeneous distributed computing environments with Cactus and Globus. The winner was the team of Gabrielle Allen,Thomas Dramlitsch, Ian Foster, Nick Karonis, Matei Ripeanu, Edward Seidel and Brian Toonen.

The Best Student Paper was awarded to a computational grid application of tomography, a technique to reconstruct the three-dimensional structure of an object from a series of two-dimensional projections. The award went to a team of Shava Smallen, Henri Cazsanova and Francine Berman, and carries a $500 cash award.

Finally, the award for Best Research Poster went to Sumir Chandra, Johan Steensland and Manish Parashar.

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Reconfigurable Architectures

Chair: Steve Reinhardt, Silicon Graphics Inc.
  • Title: Delivering Acceleration: The Potential for Increased HPC Application Performance Using Reconfigurable Logic
  • Authors:
    David Caliga (SRC Computers, Inc)
    David Peter Barker (SUPERsmith)
  • Abstract:
    SRC Computers, Inc. has integrated adaptive computing into its SRC-6 high-end server, incorporating reconfigurable processors as peers to the microprocessors. Performance improvements resulting from reconfigurable computing can provide orders of magnitude speedups for a wide variety of algorithms. Reconfigurable logic in Field Programmable Gate Arrays (FPGAs) has shown great advantage to date in special purpose applications and specialty hardware. SRC Computers is working to bring this technology into the general purpose HPC world via an advanced system interconnect and enhanced compiler technology.
  • Title: Parallel Dedicated Hardware Devices for Heterogeneous Computations
  • Authors:
    Alessandro Marongiu (CASPUR, Roma)
    Paolo Palazzari (ENEA-HPCN, Roma)
    Vittorio Rosato (ENEA-HPCN, Roma)
  • Abstract:
    We describe a design methodology which allows a fast design and prototyping of dedicated hardware devices to be used in heterogeneous computations. The platforms used in heterogeneous computations consist of a general-purpose COTS architecture which hosts a dedicated hardware device; parts of the computation are mapped onto the former, parts onto the latter, in a way to improve the overall computation efficiency. We report the design and the prototyping of a FPGA-based hardware board to be used in the search of low-autocorrelation binary sequences. The circuit has been designed by using a recently developed Parallel Hardware Generator (PHG) package which produces a synthesizable VHDL code starting from the specific algorithm expressed as a System of Affine Recurrence Equations (SARE). The performance of the realized devices has been compared to those obtained on the same numerical application on several computational platforms.
  • Title: Cost Effectiveness of an Adaptable Computing Cluster
  • Authors:
    Keith D. Underwood (Clemson University)
    Ron R. Sass (Clemson University)
    Walter B. Ligon, III (Clemson University)
  • Abstract:
    With a focus on commodity PC systems, Beowulf clusters traditionally lack the cutting edge network architectures, memory subsystems, and processor technologies found in their more expensive supercomputer counterparts. What Beowulf clusters lack in technology, they more than make up for with their significant cost advantage over traditional supercomputers. This paper presents the cost implications of an architectural extension that adds reconfigurable computing to the network interface of Beowulf clusters. A quantitative idea of cost-effectiveness is formulated to evaluate computing technologies. Here, cost-effectiveness is considered in the context of two applications: the 2D Fast Fourier Transform (2D-FFT) and integer sorting.
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